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logical operators

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Timerix
2025-03-11 14:01:47 +05:00
parent 4de066b6c1
commit ad5c2b856a
9 changed files with 185 additions and 27 deletions
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93
src/instructions/impl/logical_operators.c Normal file
View File

@@ -0,0 +1,93 @@
#include "impl_macros.h"
#define logicalOperator1Impl(NAME, OPERATOR)\
i32 NAME##_impl (VM* vm) {\
u8 src_register_i = 0;\
readRegisterVar(src_register_i);\
/*u8 value_size = 0;\
readValueSizeVar(value_size);*/\
u8 value_size = 4;\
\
switch(value_size){\
case 1: \
vm->registers.array[src_register_i].u8v0 = OPERATOR vm->registers.array[src_register_i].u8v0;\
break;\
case 2: \
vm->registers.array[src_register_i].u16v0 = OPERATOR vm->registers.array[src_register_i].u16v0;\
break;\
case 4: \
vm->registers.array[src_register_i].u32v0 = OPERATOR vm->registers.array[src_register_i].u32v0;\
break;\
case 8: \
vm->registers.array[src_register_i].u64v = OPERATOR vm->registers.array[src_register_i].u64v;\
break;\
}\
return sizeof(src_register_i) + sizeof(value_size);\
}
#define logicalOperator2Impl(NAME, OPERATOR)\
i32 NAME##_impl (VM* vm) {\
u8 dst_register_i = 0, src_register_i = 0;\
readRegisterVar(dst_register_i);\
readRegisterVar(src_register_i);\
/*u8 value_size = 0;\
readValueSizeVar(value_size);*/\
u8 value_size = 4;\
\
switch(value_size){\
case 1: \
vm->registers.array[dst_register_i].u8v0 OPERATOR##= vm->registers.array[src_register_i].u8v0;\
break;\
case 2: \
vm->registers.array[dst_register_i].u16v0 OPERATOR##= vm->registers.array[src_register_i].u16v0;\
break;\
case 4: \
vm->registers.array[dst_register_i].u32v0 OPERATOR##= vm->registers.array[src_register_i].u32v0;\
break;\
case 8: \
vm->registers.array[dst_register_i].u64v OPERATOR##= vm->registers.array[src_register_i].u64v;\
break;\
}\
return sizeof(dst_register_i) + sizeof(src_register_i) + sizeof(value_size);\
}
#define logicalOperator3Impl(NAME, OPERATOR)\
i32 NAME##_impl (VM* vm) {\
u8 dst_register_i = 0, src0_register_i = 0, src1_register_i = 0;\
readRegisterVar(dst_register_i);\
readRegisterVar(src0_register_i);\
readRegisterVar(src1_register_i);\
/*u8 value_size = 0;\
readValueSizeVar(value_size);*/\
u8 value_size = 4;\
\
switch(value_size){\
case 1: \
vm->registers.array[dst_register_i].u8v0 = vm->registers.array[src0_register_i].u8v0 OPERATOR vm->registers.array[src1_register_i].u8v0;\
break;\
case 2: \
vm->registers.array[dst_register_i].u16v0 = vm->registers.array[src0_register_i].u16v0 OPERATOR vm->registers.array[src1_register_i].u16v0;\
break;\
case 4: \
vm->registers.array[dst_register_i].u32v0 = vm->registers.array[src0_register_i].u32v0 OPERATOR vm->registers.array[src1_register_i].u32v0;\
break;\
case 8: \
vm->registers.array[dst_register_i].u64v = vm->registers.array[src0_register_i].u64v OPERATOR vm->registers.array[src1_register_i].u64v;\
break;\
}\
return sizeof(dst_register_i) + sizeof(src0_register_i) + sizeof(src1_register_i) + sizeof(value_size);\
}
logicalOperator3Impl(EQ, ==)
logicalOperator3Impl(NE, !=)
logicalOperator3Impl(LT, <)
logicalOperator3Impl(LE, <=)
logicalOperator3Impl(GT, >)
logicalOperator3Impl(GE, >=)
logicalOperator1Impl(NOT, !)
logicalOperator1Impl(INV, ~)
logicalOperator2Impl(OR, |)
logicalOperator2Impl(XOR, ^)
logicalOperator2Impl(AND, &)

23
src/instructions/impl/math_operators.c
View File

@@ -1,6 +1,7 @@
#include "impl_macros.h"
#define mathOperatorImpl(OPERATOR){\
#define mathOperator2Impl(NAME, OPERATOR)\
i32 NAME##_impl (VM* vm) {\
u8 dst_register_i = 0, src_register_i = 0;\
readRegisterVar(dst_register_i);\
readRegisterVar(src_register_i);\
@@ -26,26 +27,16 @@
}
/// ADD [dst_register] [src_register]
i32 ADD_impl(VM* vm){
mathOperatorImpl(+);
}
mathOperator2Impl(ADD, +)
/// SUB [dst_register] [src_register]
i32 SUB_impl(VM* vm){
mathOperatorImpl(-);
}
mathOperator2Impl(SUB, -)
/// MUL [dst_register] [src_register]
i32 MUL_impl(VM* vm){
mathOperatorImpl(*)
}
mathOperator2Impl(MUL, *)
/// DIV [dst_register] [src_register]
i32 DIV_impl(VM* vm){
mathOperatorImpl(/)
}
mathOperator2Impl(DIV, /)
/// MOD [dst_register] [src_register]
i32 MOD_impl(VM* vm){
mathOperatorImpl(%)
}
mathOperator2Impl(MOD, %)